Xilinx, Inc and Analogue Devices, Inc. have achieved JESD204B interoperability between the Xilinx JESD204 LogiCORE IP in the Kintex-7 FPGA and the ADI AD9250 analogue-to-digital high-speed data converter.  This is an important stage for the two companies as it is a step towards the widespread adoption of this new technology.

Transition to the high-speed transceiver based JESD204B standard opens up significant upsides for improving system performance in communications equipment. The standard offers higher level system integration, deterministic latency capability, easier multi-channel synchronisation, smaller and lower-cost device packages, reduced PCB complexity and cost, and better system modularisation.

Developed by the JEDEC standards organisation, the new specification tackles connectivity limitations between the logic device and the multiple data converter devices used in multi-mode wireless radios, wideband backhaul modems, ultrasound monitors and other high performance equipment.  JESD204B eliminates the connectivity bottleneck, complexity and improves system performance while lowering cost.

The joint interoperability lab testing successfully validated JESD204B subclass 0 and subclass 1 (deterministic latency) functionality by running a comprehensive set of tests between the Xilinx Kintex-7 XC7K325T FPGA and ADI’s AD9250 device.

Xilinx JESD204 LogiCORE supports continuous line rates from 1Gb/s to 12.5Gb/s on 1, 2, 3, 4, 5, 6, 7, or 8 lanes using GTX or GTH transceivers in Zynq-7000, Kintex-7 and Virtex-7 28nm devices and GTP transceivers in the 28nm Artix-7 FPGA family. Xilinx JESD204B IP can be configured as a transmitter or receiver and supports transceiver sharing between a transmitter and receiver link.

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