5G: impacting the overall network infrastructure
The advent of 5G networks will bring tremendous opportunities. This fifth generation of mobile networks is expected to enable mobile broadband with data rates of up to 10Gbps, and promises to enable machine-to-machine communication in support of the Internet of Things platform. These applications require high reliability and low latencies: below 1ms. To allow for this, changes need to be made to the overall network infrastructure (including base stations and small cells), as well as in the technologies for mobile devices.
In the first phase of 5G deployment, wireless communication radios will operate in the sub-6GHz radio frequency (RF) bands. But, to cope with the upcoming spectrum scarcity within these bands, bandwidth is being sought at mm-wave bands. The introduction of these mm-wave frequencies will have a significant impact on the overall 5G network infrastructure.
High-speed front-end devices for 5G mobile handsets
For mobile handsets such as smartphones, this translates into an increasing complexity of the RF front-end modules – containing components such as the transmitter/receiver, bandpass filters, power amplifiers and local oscillators. Sub-6GHz bands and mm-wave bands will now need to be enabled in one common architecture, and devices will need to access several bands simultaneously. Therefore, higher speed front-end devices than currently used in 4G-LTE are needed. Also, the mm-wave functionality will have to be implemented in battery powered mobile devices, which will put severe restrictions on the power consumption of the mm-wave circuits. To meet all these challenges, we need high-speed devices that have both a high output power and a high power efficiency.
Today, several device technologies are being used for RF applications, including RF SOI and SiGe technologies. Of particular interest is the use of III-V devices, such as III-V HEMTs (GaAs- or InP-based) and III-V heterojunction bipolar transistors (HBTs). And, although originally designed for high-power applications, III-N devices (such as GaN-based HEMT devices) have also demonstrated high-frequency performance, exceeding 400GHz.
So far, Si and III-V (or III-N) circuits have been fabricated and packaged separately, and then later assembled on the same carrier substrate. This approach sets restrictions on further performance optimisation, and on the reduction of power, cost, form factor and circuit complexity. However, reducing the form factor will be essential, as space within the mobile handset is limited. Other challenges relate to the compatibility of these circuits with cost-effective, high-volume Si manufacturing.
High-speed analog/RF: addressing the 5G performance needs for mobile devices
To enable RF front-end modules for future 5G mobile handsets, Imec is running the industrial affiliation program ‘High-speed analog/RF’. Within this program, Imec and its partners jointly explore hybrid Si/III-V to enable high-performant RF devices with high output power and high power efficiency. They explore several device architectures, including III-V (GaAs- and InP-based) and III-N HEMT devices, III-V HBT devices, as well as III-V and III-N MOSFET devices.
In its first phase, the program focuses on integrating III-V and III-N standalone devices on a 200mm and 300mm Si platform. Specific process steps and modules are being developed that have been identified as critical for the integration.
In its second phase, the program will target the co-integration of the specialised, high-speed III-V/ III-N devices (used for the RF front-end) with standard Si CMOS (used for the transceiver and digital signal processing). This way, a higher degree of integration will be achieved, resulting in a reduced form factor and an improved energy efficiency of the overall circuit. Several approaches for the co-integration are being explored, such as monolithic or 2D integration (with the Si devices and III-V/III-N devices in the same plane) or 3D integration (via either 3D stacking, or sequential 3D through the sequential processing of different device layers).
Leveraging existing technology solutions
Imec houses technologies under one roof to develop hybrid Si/III-V RF front-end technologies for 5G applications. The program partners make use of Imec’s expertise on III-V-on-300mm Si technologies, developed in the context of CMOS scaling; Imec can rely on an extended CMOS toolset, such as 193nm (immersion) lithography and CMOS compatible back-end-of-line modules.
The analog/RF program also leverages Imec’s expertise in III-N technology, such as its GaN-on-200mm Si technology platform. Originally developed for power electronics applications, the team investigates how these GaN-on-Si devices can be tuned towards RF applications.
And Imec uses its expertise on sub-6GHz and mm-wave wireless communication technologies. Close collaboration with the modelling and circuit design teams is essential to define the required device targets for 5G applications. Bringing together expertise in III-V and III-N technology, CMOS technology, wireless communication technologies, and in modelling and circuit design technologies will be crucial to take RF beyond the speed and power limits of CMOS technologies.
