The transition to SoC verification
Michael Sanie, Director of verification Product Marketing at Synopsys, explains why it’s time for the next major shift in verification technology to bring about an order-of-magnitude increase to …
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Training and support service for developing with Intel Data Plane
23 May 2012 | EDA
A training and support services has been announced by Wind River, for the development of applications based on the Intel Data Plane Development Kit (Intel DPDK). This service is now available to …
Read MoreADC with SPICE model that enables designers to simulate, model and test the full analogue signal chain
22 May 2012 | EDA
Texas Instruments Incorporated (TI) has introduced a successive-approximation-register (SAR) analogue-to-digital converter (ADC) with a downloadable TINA-TI SPICE model, enabling system designers to …
Read MoreDesign tool supports ISO 26262 compliant design of mixed-criticality automotive electronics systems
20 Apr 2012 | EDA
The SymTA/S methodology meets primary ISO 26262 requirements for reliable coverage of failure and error-free timing scenarios, and overcomes inherent safety vs. efficiency conflictSymtavision has …
Read MoreFPGAs program reduces development time for HDR-enabled television solution
11 Apr 2012 | EDA
Altera Corporation has announced goHDR, one of its early customers in the OpenCL for FPGAs program, achieved a significant reduction in development time and a dramatic increase in performance using …
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