GOEPEL electronic provides two new families of packages for both technology introduction and advanced complex projects in JTAG/Boundary Scan. For technology introduction as well as running complex projects they fit perfectly providing high price-performance ratio and a multitude of functionalities for board testing and programming.
SCANFLEX® Designer Studio is a complete Boundary Scan test system incl. hardware and software, developed for test and debug tasks in complex projects and higher system performances in both design and production stages. The package opens extensive opportunities for complex projects with great potential to be extended to further Embedded System Access (ESA) technologies such as ChipVORX® and VarioTAP®, and can be extended by additional I/O modules for further test and programming tasks.
Due to the availability of three versions, the bundle’s performance level may be upgraded from production line test station (Base Version) to in-system programming of Flash and PLDs as well as memory and cluster tests (Standard Version) up to full fault finding and diagnostic capabilities with layout visualization of faults (Comfort Version). An upgrade from one to the next higher version is possible anytime. Numerous additional hardware and software options are available from the extensive Goepel range, so that the test unit’s performance may grow with the application and investments are protected.
PicoTAP Designer Studio is also a complete Boundary Scan test system incl. hardware and software, providing a low-cost entry solution for JTAG/Boundary Scan. In addition to a mixed-signal I/O module, the bundle contains the world’s smallest Boundary Scan controller PicoTAP, which is powered via USB and can be plugged directly into the I/O module.
The various bundles are able to cover a multitude of Boundary Scan applications, for instance prototype hardware debugging or field engineer test systems, using interconnection test between BGA components to validate the operation of the core of the board, before it is required to boot from any firmware, it suits for the design stage as well as small batch production. Furthermore, it presents an interesting solution for respective projects at universities and polytechnic colleges.
The bundle’s performance level can be extended from pure test (base version) to additional applications such as in-system programming of small Flash and PLD or memory and cluster test. Numerous additional hardware and software options are available from the extensive Goepel range, so that the test unit’s performance may grow with the application and investments are protected.
All test and programming solutions developed using the new Designer Studio systems are fully transferable onto all Goepel hardware platforms, so a test could start life on the simplest of the systems, the PicoTAP, as the testing evolves and the volumes increase a SCANFEX system can be employed in production testing and if volumes reach high levels the full inline test and programming station RAPIDO could be used, all executing the same test solution code, without modification!!!
About Boundary Scan:
Boundary Scan (IEEE Std. 1149.x) is a modern access method for the test and programming of complex circuits without mechanical probe access (non-intrusive). Boundary Scan is part of the Embedded System Access (ESA) strategies and is based on design-integrated test electronics.
JTAG/Boundary Scan is the world’s only standardized electric test method (IEEE Std. 1149.x). Stimulating and measuring the single circuitries on assemblies is no longer executed via predetermined test points and its connected metrology but Boundary Scan cells integrated into a component.
Necessary information transmission between test system and Boundary Scan component is executed via a standardized four-wire test bus. The test bus must be considered in board design, sort of replacing the test points that would have been determined for an In-Circuit Test (ICT) or Flying Probe Test (FPT). Consequently, a test system must only provide a port for this test bus.
As test points are no longer required, there aren’t the same access problems as for ICT or FPT. The Boundary Scan cells are located between the component’s pins and its inner logic. Hence, the core logic does not play a role for testing board circuitries any longer. It doesn’t matter whether it is a processor or PLD.
GOEPEL electronic is a worldwide leading vendor of innovative electronic and optical test and inspection systems, being the market leader for professional JTAG/Boundary Scan solutions for Embedded System Access (ESA). A network of branch offices, distributors and service partners ensures the global availability of the products as well as the support of the more than 8,500 system installations. GOEPEL electronic’s products won several awards in recent years and are used by the leading companies in telecommunication, automotive, space and avionics, industrial controls, medical technology, and other industries. Further information about the company and its products can be found on the internet at www.goepel.co.uk