A new professional boundary-scan tool-set is now available from JTAG.

The company advises its JTAGLive Studio is a package of JTAG/boundary-scan tools that enable users to develop complete test and programming applications.

The solution works with or without design netlist data and can be used to test interconnects (from individual nets to an entire board), logic clusters, memories and more. It also includes device programming features that support JAM/STAPL and SVF data formats for CPLD and [FPGA] configuration PROM programming. It can be further used to program flash and serial PROMs.

Low-cost options for accessing the debug modes of processor cores allows lower-price access to techniques known variously as Processor Controlled Test and JTAG Emulation Test. A dedicated, USB-powered, TAP interface/controller with programmable thresholds is also supplied.

Many of the cluster test and memory programming features are provided through the company’s Python language JTAG script routines, called through the platforms embedded API. This can again be used to construct stand-alone test sequences in conjunction with 3rd party, open source libraries.

Designs with only one or two JTAG devices can benefit greatly from this technology throughout their life cycle. Such designs are now served by a cost-effective JTAG toolset making it feasible for many more companies to adopt a JTAG/Boundary-scan strategy.

JTAG Technologies UK