A major research project in Europe exploring highly integrated system-in-package solutions has reached a pinnacle of discovery. The ESiP (Efficient Silicon Multi-Chip System-in-Package Integration) project partners have achieved future system-in-package solutions that it claims are more compact and reliable. They have also developed methods for simplifying analyses and tests. The project was managed by Infineon Technologies, 40 research partners – microelectronics companies and research institutions – from a total of nine European countries.
System-in-Package (SiP) is a process involving different types of chips made using different production techniques and structure widths are embedded side by side or stacked above one another in one chip package and work smoothly together.
The project explored the development of technologies combining chips in SiP packages along with procedures for measuring reliability methods as well as equipment for failure analysis and testing. Basic technologies were developed that enable the integration of various types of chips in the smallest volume of an SiP package, for example, customer-specific processors with the latest CMOS technologies, light-emitting diodes and DC-DC converters, MEMS and sensor components and passive components such as miniaturised capacitors and inductors. The ESiP findings will enable future microelectronic systems to have more functionality while at the same time being considerably smaller and more reliable.
These compact SiP solutions are ideal for electric vehicles, industrial applications, medical equipment and communications technology.
Researchers explored the development of new production processes for SiP solutions with two or more very different chips in one package. New materials for building SiP solutions were also investigated. The research partners have proven the feasibility and reliability of the new production processes with more than 20 different test vehicles. Moreover, in the course of the research work it was confirmed that the test procedures commonly used today are no longer sufficient for future SiP solutions. That’s why new test flows, probe stations and probe adapters were developed for 3D SiP.
“The successful ESiP research enhances Europe’s position in the development and manufacture of miniaturised microelectronics systems,” says Dr. Klaus Pressel, ESiP project head and responsible for international cooperation on assembly and packaging solutions at Infineon Technologies AG. “With the ESiP findings we will be able to further miniaturise and improve microelectronic systems. We have developed new manufacturing processes and materials for SiP solutions along with methods for testing them, running a failure analysis on them and evaluating their reliability.”
Infineon
