Introduction
JTAGLive Studio is a uniquely low-cost, yet professional, boundary-scan system that delivers a powerful suite of hardware debug tools with the option to build a sequence for automated testing and in-system programming of PCBs (printed circuit boards). Combine the individual PCB tests (interconnect and cluster tests) with in-system programming of on-board flash memories, CPLDs and serial configuration PROMs to perform board test and programming in a single automated procedure.
Based on the proven JTAGLive platform Studio offers users two ‘stand-out’ features:- the Python-based Script and new AutoBuzz. Script, backed by a universally acclaimed open-source programming language, allows you to quickly create wide ranging PCB-level logic cluster tests and device-level programming functions. AutoBuzz meanwhile uses a novel seek and discover mode to learn board interconnections from design data, or a known good board, allowing you to compare them against a target. Combined with a state of the art compact JTAG controller makes Studio a compelling board test solution for most enterprises. Optional CoreCommander routines gives you additional flexibility through use of emulative test capabilities deployed in many microprocessor cores and a new concept FPGA translator.
Interconnect Testing
AutoBuzz’s unique seek and discover mechanism is the key to this effective interconnect test program and can be used either with or without CAD netlist information. When used without a netlist, AutoBuzz is applied in a learn mode onto a known good board (only BSDL models for the IEEE 1149.1 compliant parts are needed) and a connectivity signature is automatically created by toggling each boundary-scan driver in turn and monitoring responses. Once the connectivity signature has been refined users can switch to compare mode and test the known good signature against that of a faulty board. Pin connection mismatches due to open pins or shorted nets are highlighted and can be subject to imperical examination.
AutoBuzz also features a netlist learn mode whereby a supplied CAD netlist can be subject to a virtual connectivity signature gathering exercise. Transparent devices such as resistors and buffers can be assigned to nets during the netlist learn process in order to make an accurate reference.
Script – Logic Cluster testing and beyond
Using a built-in Python API and comprehensive library of JTAG/boundary-scan control functions (see table for examples), engineers can compose re-usable tests that range from simple pin toggling to sophisticated memory read/write checks on parts such as DDR memories. Logic clusters, ADC, DACs or even Ethernet PHYs can all be tested in this way – sample libraries for SPI and I2C bus are also supplied. By incorporating file I/O calls users can even make flash memory or serial prom programming applications.
Using the open-source Python language also allows the test developer the option to import functions from 1000s of freely available libraries to enhance the test performance.
CoreCommander – striking out from the heart of your design
CoreCommander modules allow engineers access deep into the heart of microprocessors or FPGAs. While traditional boundary-scan access provides easy, standardised access to device pins for test purposes, not all pins have boundary-scan register cells to control them. So called deficient devices will however often have an on-chip debug system implemented that is accessible via standard JTAG hardware. CoreCommander Micro functions exploit these features for board test purposes often allowing faster ‘at-speed’ testing or mixed signal measurements via the embedded chip resources.
CoreCommander FPGA works on the same principles as the Micro version, although in this instance the ‘core’ is a specially developed translator module that provides an interface from the native TAP, through to embedded IP modules via standard bus structures such as Wishbone, CoreConnect, Avalon and AMBA.
CoreCommander functions are accessible through an interactive console that can also be used to record short macros, or via Python scripting. In the second instance CoreCommander functions can also be combined with regular boundary-scan activity.
JTAG Live Studio is available for 2950 GBP – see www.jtaglive.com for further detail or call 01234 831212
